PDCAT 2005

       Keynote Speeches


Future Technological Challenges for High Performance Computers
Dr. Tadashi Watanabe, NEC Corp., Japan

Dr. Tadashi Watanabe received the BEEE and MEEE from the University of Tokyo, and PhD in information science from Tohoku University.

He joined NEC in '68. Since then he has been involved in the development of NEC's high-end main frame computers and supercomputers, particularly involved in their architectural designs.

He is now in charge of the marketing and product planning of NEC's high performance computer systems as Vice President of NEC's Computer Platform Business Unit.

He received the ACM/IEEE Eckert-Mauchly award of 1998 to the contribution of the architectural design of the multiple/parallel vector supercomputers.

Abstract of the speech:

A high performance computer (HPC), sometimes called a supercomputer, is a high-speed, large-scale computer system designed for scientific and technical computations in application areas such as meteorology, molecular and bio-science, energy development, space science and so forth. These applications are called "Grand Challenge Problems" in which the major target is to run application programs within limited time periods.

In this talk, architectural and system's key points as well as basic hardware technologies to realize high performance computer systems for grand challenge problems will be prsented.


An Agile Programming Model for Grid End Users
Zhiwei Xu, Chinese Academy of Sciences, China

Zhiwei Xu obtained his PhD degree from University of Southern California in 1987. He is currently a professor and deputy director of Institute of Computing Technology (ICT), Chinese Academy of Sciences. His research interests include HPC architecture, distributed operating system, and grid computing.

Abstract of the speech:

Grid and service computing technologies have been explored by enterprises to promote integration, sharing, and collaboration. However, quick response to business environment changes is still a challenging issue. For end users, developing, customizing, and re-engineering applications remain a difficult and time-consuming task. Users still need to deal with excessive low-level details of platform-specific APIs. We present a high-level programming model together with a descriptive glueing language called GSML, to facilitate end-user programming. In this approach, applications could be visually composed from well-defined software components called "funnels" in an event-driven fashion. Application examples have shown that, by raising the level of abstraction as well as simplifying the programming model, GSML could empower end users to build grid applications on demand with improved productivity.


Scalable and Practical Nonblocking Switching Networks
Si Qing Zheng, University of Texas at Dallas, USA

Si Qing Zheng received BS degree physics from Jilin University, China, in 1973. He worked as a research engineer at High Energy Physics Institute of Chinese Academy in Beijing. From 1976 to 1978, he was a member of the united development team of DJS-140 computer system. The team, which was under the direct supervision of the Chinese government, consists of members from Chinese Academy of Sciences, universities, and industry, and S.Q. Zheng was one of the representatives from Academy of Sciences. This project won the first class award at the First National Congress of Science and Technology held in Beijing, 1980.

S.Q. Zheng went to US to pursue graduate studies in 1980. He received MS degree in computer science from University of Texas at Dallas in 1982, and PhD degree in electrical and computer engineering from University of California, Santa Barbara, in 1987. After being on the faculty of Louisiana State University for eleven years since 1987, he joined University of Texas at Dallas as a full professor of computer science, computer engineering, and telecommunications engineering.

Dr. Zheng has a wide range of research interests, which include algorithms, combinatorial optimization, computer architectures, real-time systems, networks, parallel and distributed processing, telecommunications, VLSI design, and hardware/software codesign. He has published over 200 research articles in these areas. In addition, Dr. Zheng was invited to participate in industrial research and development. He made important contributions to the development of a WDM optical router prototype and the design of an information search engine. He was a consultant of several high-tech companies, and he holds numerous patents. Dr. Zheng's work addresses both theoretical
aspects and practical issues.

Dr. Zheng is also active professionally. He served as program committee chairman of numerous international conferences, committee member of 70 international conferences, and editor of several professional journals.

Abstract of the speech:

Switching networks are widely used as core components in network switches and routers, and communication subsyetems in parallel computing systems. Most switching networks are multistage interconnection networks built with small-size switching elements. Nonblocking switching networks have been favored because of their capability of setting up any one-to-one I/O connections. There are three types of nonblocking networks: strictly nonblocking (SNB), wide-sense nonblocking (WSNB) and rearrangeable nonblocking (RNB). In both SNB and WSNB networks, a connection can be established from any idle input to any idle output without disturbing existing connections. In SNB networks any of available conflict-free paths for a connection can be chosen and in WSNB networks, however, a rule must be followed to choose one. The high degree of connection capability in SNB and WSNB networks is at a high hardware cost. RNB networks, usually constructed with lower hardware cost, can establish a conflict-free path for the connection from any idle input to any idle output if the rearrangement of existing connections is allowed. Large-scale SNB and WSNB switching networks, which are suitable for circuit switching, are usually infeasible in practice due to their high cost. In contrast, rearrangeable networks are more scalable because of their much lower cost. However, rearrangeable networks are not suitable for circuit switching. Over the years, a rich theory of nonblocking switching networks has been developed. Unfortunately, no explicitly constructable optimal-cost SNB and WSNB network has been discovered. Known powerful nonblocking networks are either costly and unscalable, or very inefficient in routing connections. In this talk, we introduce the the notion of virtual nonblockingness and almost nonblockingness, and the concepts of virtual nonblocking (VNB) networks and almost nonblocking (ANB) networks. We show that a VNB/ANB network functions like a SNB/WSNB network, but it is constructed with the cost, which can be optimal, of an RNB network. We also show that parallel/distributed routing feature can be incorporated into VNB and ANB networks. The important implication of the notion of VNB and ANB networks is that for large-scale switching applications, all we need to do is to build VNB and ANB switching networks, instead of resorting to SNB and WSNB switching networks.