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Research about basic technology of next generation supercomputers

INOGUCHI Laboratory
Professor:INOGUCHI Yasushi

E-mail:
[Research areas]
Massively Parallel Systems
[Keywords]
Massively parallel architecture, Parallel processing, Reconfigurable systems, Super computers

Skills and background we are looking for in prospective students

Programming skills such as C or VHDL are desired. However, a student can learn programming after he/she enters our laboratory. Almost half students have programming skills when he/she entered to our laboratory, remained half students learn after he/she enter to our laboratory.

What you can expect to learn in this laboratory

A student can learn several skills in the followings.

  1. Design method of parallel computers. Basic knowledge to design next generation parallel systems such as Interconnections and routing.
  2. How to use parallel systems. Parallel programming techniques such as MPI and OpenMP.
  3. GPGPU computing. Programming skills to use CUDA or OpenAcc.
  4. Design method of digital circuit. How to design FPGAs and ASICs.
  5. Visualization techniques. How to use the 3D visualization equipment and programming techniques.

【Job category of graduates】General electrical manufacturers, telecommunications companies, cloud ventures.

Research outline

Our laboratory researches about design method of massively parallel systems and parallel applications. Both hardware oriented research and software oriented research are our scope. The followings are our current research projects.
Recently, the DSA (Domain Specific Architecture) has been a hot topic to accelerate execution speed of an application. Our laboratory develops suitable architectures for several applications.

  1. Giga speed audio fingerprint detection and searching.
    Accelerate the detection speed of audio fingerprint using FPGAs and GPGPUs.
    Currently over than 1Gbps speed is established.
  2. High-speed numerical solution of linear equation systems using GPGPUs.
    GPGPU has a great potential to solve large-scale linear equation system in a short time, but memory capacity is one of the serious problems. We developed a new sparse matrix comp- ression method for a GPGPU and reduce 35% memory usage.
  3. Real time acoustic simulation using FPGAs or ASICs.

Our laboratory welcomes a student

  • Wants to research next generation computer systems,
  • Who want to use a massively parallel system or a FPGA.
  • Who graduated from department of chemistry or physics and interested in computer systems.

A student can choose research topic by both ways: decides his/her self or joins a research project in our laboratory.

Key publications

  1. T. Yiyu, Y. Inoguchi, M. Otani, Y. Iwaya and T. Tsuchiya, "A Real-Time Sound Field Rendering Processor", Applied Sciences, MDPI, Vol. 8, No. 1, 17 pages online, Jan., 2018
  2. M. Fukuda and Y. Inoguchi, "Probabilistic Stra-tegies Based on Staged LSH for Speedup of Audio Fingerprint Searching with Ten Million Scale Database", International Symposium on Highly Efficient Accelerators and Reconfi-gurable Technologies (HEART), 6 pages in CD-ROM, Bochum, DE, June 7, 2017
  3. T. Kawamura, Y. Kazunori, T. Yamazaki, T. Iwamura, M. Watanabe and Y. Inoguchi, "A compression method for storage formats of sparse matrix in solving the large scale linear systems", Proc. In APDCM held in conjunction with 31rd IEEE IPDPS, pp.924-931, Orlando, FL, USA, Mar. 29, 2017

Equipment

Massively parallel system, Cray XC40.
GPGPU Clusters
3D Visualization system, CAVE
Digital circuit design system, logic analyzers.

Teaching policy

A graduate becomes a human who can act a professional.
Not only supercomputers but also usual PCs and smartphone use multicore processors.
A graduate can act as a leader of a team to develop new hardware systems and applications.

[Website] URL:http://ino-www.jaist.ac.jp/index.html.en

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