Input TRS:
    1: half(0()) -> 0()
    2: half(s(0())) -> 0()
    3: half(s(s(x))) -> s(half(x))
    4: bits(0()) -> 0()
    5: bits(s(x)) -> s(bits(half(s(x))))
Number of strict rules: 5
Direct Order(PosReal,>,Poly) ... removes: 4
     s(x1)	weight: x1
  half(x1)	weight: x1
     0()	weight: 0
  bits(x1)	weight: 18458 + x1
Number of strict rules: 4
Direct Order(PosReal,>,Poly) ... failed.
Freezing half
1: half❆1_0() -> 0()
2: half❆1_s(0()) -> 0()
3: half❆1_s(s(x)) -> s(half(x))
5: bits(s(x)) -> s(bits(half❆1_s(x)))
6: half(0()) ->= half❆1_0()
7: half(s(_1)) ->= half❆1_s(_1)
Number of strict rules: 4
Direct Order(PosReal,>,Poly) ... removes: 7
     s(x1)	weight: (/ 1 4) + x1
  half(x1)	weight: x1
half❆1_s(x1)	weight: x1
     0()	weight: 0
  bits(x1)	weight: (/ 1 4) + x1
half❆1_0()	weight: 0
Number of strict rules: 4
Direct Order(PosReal,>,Poly) ... removes: 3 5 6 2
     s(x1)	weight: (/ 5 16) + x1
  half(x1)	weight: (/ 1 16) + x1
half❆1_s(x1)	weight: (/ 1 8) + x1
     0()	weight: 0
  bits(x1)	weight: 2 * x1
half❆1_0()	weight: 0
Number of strict rules: 1
Direct Order(PosReal,>,Poly) ... failed.
Dependency Pairs:
Number of SCCs: 0, DPs: 0, edges: 0
YES