Selected Publications

[Japanese]

1. Journal Publications2. International Conference Publications
3. Invited Talks4. International Workshop
5. Poster Presentations6. Books and Other Publications

1. Journal Publications
  1. Koichi Araki, Yukinori Sato, Yasushi Inoguchi. A Low Power Oriented Automatic Hardware Tuning for FPGA-based Embedded Hardware Development. IEICE Transactions JD, Vol.J98-D, No.1, pp.182-192, Jan. 2015. (link to IEICE) (In Japanese)
  2. Yukinori Sato, Yasushi Inoguchi, Tadao Nakamura. Identifying Program Loop Nesting Structures during Execution of Machine Code. IEICE Transaction on Information and Systems, Vol.E97-D, No.9, pp.2371-2385, Sep. 2014. （DOI:10.1587/transinf.2013EDP7455) (link to IEICE)
  3. Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, Takao Tsuchiya. A real-time sound rendering system based on the finite-difference time-domain algorithm. Japanese Journal of Applied Physics, Volume 53, Number 7S, Jul. 2014. (DOI:10.7567/JJAP.53.07KC14) (link to IOP Science)
  4. Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Takao Tsuchiya. Design and implementation of a two-dimensional sound field solver based on the Digital Huygens’ Model. Microprocessors and Microsystems. Volume 38, Issue 3, Pages 216–225, May 2014. (DOI:10.1016/j.micpro.2014.02.001) (link to ScienceDirect)
  5. M. M. Hafizur Rahman, Yukinori Sato, and Yasushi Inoguchi. High and stable performance under adverse traffic patterns of tori-connected torus network. Computers and Electrical Engineering，Volume 39，Issue 3，Pages 973-983，April 2013. (DOI:10.1016/j.compeleceng.2012.12.014) (link to ScienceDirect)
  6. Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka and Takao Tsuchiya. A Hardware-Oriented Finite-Difference Time-Domain Algorithm for Sound Field Rendering. Japanese Journal of Applied Physics, Volume 52, Number 7S, Pages 07HC03-1—6, June, 2013. (link to JJAP)
  7. M. M. Hafizur Rahman, Yukinori Sato, Yasushi Inoguchi. High Performance Hierarchical Torus Network Under Adverse Traffic Patterns. Journal of Networks, Academy Publisher 7: 3. pp. 456-467, March 2012. (DOI:10.4304/jnw.7.3.456-467) (link to Academy Publisher)
  8. M. M. Hafizur Rahman, Yukinori Sato, Yasushi Inoguchi. Dynamic Communication Performance Enhancement in Hierarchical Torus Network by Selection Algorithm. Journal of Networks, Academy Publisher 7: 3. p. 468-479, March 2012. (DOI:10.1109/ICCITECHN.2010.5723855) (link to IEEE Xplore)
  9. Truong Vinh Truong Duy, Yukinori Sato, and Yasushi Inoguchi. A prediction-based green scheduler for datacenters in clouds. IEICE Transactions on Information and Systems，Vol. E94-D，No. 9，pp. 1731-1741，September 2011. (DOI:10.1587/transinf.E92.D.1062) (link to IEICE)
  10. Truong Vinh Truong Duy, Yukinori Sato, and Yasushi Inoguchi. Improving accuracy of host load predictions on computational grids by artificial neural networks. International Journal of Parallel, Emergent and Distributed Systems，Vol. 26，No. 4，pp. 275-290，August 2011. (DOI:10.1080/17445760.2010.481786) (link to Taylor Francis Online)
  11. Tan Yiyu, Yasushi Inoguchi, Eiko Sugawara, Makoto Otani, Yukio Iwaya, Yukinori Sato, Hiroshi Matsuoka, and Takao Tsuchiya. A real-time sound field renderer based on digital Huygens’ model. Journal of Sound and Vibration，Vol. 330，No. 17，pp. 4302-4312，August 2011. (DOI:10.1016/j.jsv.2011.04.030) (link to ScienceDirect)
  12. M.M. Hafizur Rahman, Yukinori Sato, and Yasushi Inoguchi. On nonuniform traffic pattern of modifed hierarchical 3d-torus network. IEICE Transactions on Information and Systems，Vol. E94-D，No. 5，pp. 1109-1112，May 2011. (DOI:10.1587/transinf.E94.D.1109) (link to IEICE)
  13. M.M. Hafizur Rahman, Yasushi Inoguchi, Yukinori Sato, Yasuyuki Miura, and Susumu Horiguchi. Dynamic communication performance of a TESH network under the nonuniform traffic patterns. Journal of Networks, Vol. 4, No. 10, pp. 941–951, December 2009. (DOI:10.4304/jnw.4.10.941-951) (link to Academy Publisher)
  14. Koichi Araki, Yukinori Sato, and Yasushi Inoguchi. An Effective Processing Method for Hiding Data Transfer of Parallel Tasks on a Dynamically Reconfigurable Processor. IEICE Transactions JD, Vol. J92-D, No. 12, pp. 2137–2146, December 2009. (link to IEICE) (In Japanese)
  15. M.M. Hafizur Rahman, Yasushi Inoguchi, Yukinori Sato, and Susumu Horiguchi. TTN: A high performance hierarchical interconnection network for massively parallel computers. IEICE Transactions on Information and Systems, Vol. E92-D, No. 5, pp. 1062–1078, May 2009. (DOI:10.1587/transinf.E92.D.1062) (link to IEICE)
  16. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Designing a Low-power Superscalar Processor Based on Its Clustered Datapath. IPSJ Transactions on Advanced Computing Systems, Vol. 48, No. SIG13(ACS19), pp. 84–94, August 2007. (link to IPSJ) (In Japanese)
  17. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Power estimation of partitioned register files in a clustered architecture with performance evaluation. IEICE Transactions on Information and Systems, Vol. E90-D, No. 3, pp. 627–636, March 2007. (DOI:10.1093/ietisy/e90-d.3.627) (link to IEICE)
  18. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Partitioned register file designs for clustered architectures. Journal of Information, Vol. 9, pp. 119–134, January 2006. [link]

[Top]

2. International Conference Publications
  1. Yuichiro Yasui, Katsuki Fujisawa, Yukinori Sato. Fast & Energy-Efficient Breadth-First Search on a Single NUMA System. International Supercomputing Conference 2014 (ISC’14), Lecture Notes in Computer Science Volume 8488, pp 365-381, June 2014. (DOI:10.1007/978-3-319-07518-1_23) (link to Springer) [presentation details]
  2. Yukinori Sato, Yasushi Inoguchi, Wayne Luk and Tadao Nakamura. Evaluating Reconfigurable Dataflow Computing Using the Himeno Benchmark. In Proceedings of 2012 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012)，pp.1-7，December 2012. (DOI:10.1109/ReConFig.2012.6416746) [presentation pdf] (link to IEEE Xplore)
  3. Yukinori Sato, Yasushi Inoguchi, Tadao Nakamura. Whole Program Data Dependence Profiling to Unveil Parallel Regions in the Dynamic Execution. In Proceedings of 2012 IEEE International Symposium on Workload Characterization (IISWC 2012)，pp.69-80，November 2012. (DOI:10.1109/IISWC.2012.6402902) [presentation pdf] (link to IEEE Xplore).
  4. Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka and Takao Tsuchiya. Analysis of Sound Field Distribution for Room Acoustic: From the Point of View of Hardware Implementation. In Proceedings of 15th International Conference on Digital Audio Effects (DAFx-12), York, U.K., pp.93-96, September 2012.
  5. Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, Takao Tsuchiya. Design of a FPGA-based Timing Sharing Architecture for Sound Rendering Applications. In Proceedings of 2012 9th International Conference on Information Technology: Next Generations (ITNG 2012), pp.484-489, Las Vegas, USA, April 2012. (DOI:10.1109/ITNG.2012.110) (link to IEEE Xplore)
  6. Yasushi Inoguchi, Tan Yiyu, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya. DHM and FDTD based hardware sound field simulation acceleration. In Proceedings of 14th International Conference on Digital Audio Effects (DAFx-11)，pp. 69-72，September 2011.
  7. Yukinori Sato, Yasushi Inoguchi, and Tadao Nakamura. On-the-fly detection of precise loop nests across procedures on a dynamic binary translation system. In Proceedings of the 8th ACM International Conference on Computing Frontiers (CF’11)，pp. 25:0-25:10，May 2011. (DOI:10.1145/2016604.2016634) [presentation pdf] (link to ACM Digital Library)
  8. M.M. Hafizur Rahman, Yukinori Sato, Yasuyuki Miura, and Yasushi Inoguchi. Dynamic communication performance of hierarchical 3D-torus network. In Proceedings of 10th IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN 2011)，pp. 9-16，February 2011. (DOI:10.2316/P.2011.719-055) (link to ACTA press)
  9. Tan Yiyu, Yukinori Sato, Eiko Sugawara, Yasushi Inoguchi, Makoto Ohya, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya. A FPGA Implementation of the Two-Dimensional Digital Huygens’ Model. In Proceedins of the 2010 International Conference on Field-Programmable Technology (FPT’10), Poster Session. pp. 304-307，December 2010. (DOI:10.1109/FPT.2010.5681441) (link to IEEE Xplore)
  10. M.M. Hafizur Rahman, Yukinori Sato, and Yasushi Inoguchi. Dynamic communication performance enhancement in hierarchical torus network by selection algorithm. In Proceedins of 13th International Conference on Computer and Information Technology (ICCIT 2010), pp.204-209, December 2010. (DOI:10.1109/ICCITECHN.2010.5723855) (link to IEEE Xplore)
  11. M.M. Hafizur Rahman, Yukinori Sato, and Yasushi Inoguchi. High performance hierarchical torus network under adverse traffic patterns. In Proceedins of 13th International Conference on Computer and Information Technology (ICCIT 2010), pp.210-215, December 2010. (DOI:10.1109/ICCITECHN.2010.5723856) (link to IEEE Xplore)
  12. M.M. Hafizur Rahman, Yasushi Inoguchi, Yukinori Sato, Yasuyuki Miura, and Susumu Horiguchi. On hot-spot traffic pattern of TESH network. In Proceedings of 11th International Conference on Computer and Information Technology (ICCIT 2008), pp. 359–364, December 2008. (DOI:10.1109/ICCITECHN.2008.4802999) (link to IEEE Xplore)
  13. M.M. Hafizur Rahman, Yasushi Inoguchi, Yukinori Sato, Yasuyuki Miura, and Susumu Horiguchi. Dynamic communication performance of a TESH network under the nonuniform traffic patterns. In Proceedings of 11th International Conference on Computer and Information Technology (ICCIT 2008), pp. 365–370, December 2008. (DOI:10.1109/ICCITECHN.2008.4803069) (link to IEEE Xplore)
  14. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Cooperation of neighboring PEs in clustered architectures. In Proceedings of 17th International Symposium on Computer Architecture and High Performance Computing(SBAC-PAD), pp. 134-141, October 2005. (DOI:10.1109/CAHPC.2005.21) (link to IEEE Xplore)
  15. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. An operand status based instruction steering scheme for clustered architectures. In Proceedings of the 2005 International Conference on Computer Design (CDES’05), pp. 168-174, 2005.

[Top]

3. Invited Talks
  1. Yukinori Sato. HPC Systems at JAIST and Development of Dynamic Loop Monitoring Tools Toward Runtime Parallelization. 13th Teraflop Workshop，Tohoku University, Sendai, Japan, 21-22 October 2010.

[Top]

4. International Workshop
  1. Yukinori Sato and Toshio Endo. Dynamic Compilation for Transparent Data Locality Analysis and Memory Subsystem Tuning. Workshop on Architectural and MicroArchitectural Support for Binary Translation and Dynamic Optimization (AMAS-DO 2016), held in conjunction with CGO2016, March 2016.
  2. Yukinori Sato, Shimpei Sato, and Toshio Endo. Exana: An Execution-driven Application Analysis Tool for Assisting Productive Performance Tuning. Proceedings of the 2nd Workshop on Software Engineering for Parallel Systems (SEPS 2015), held in conjunction with SPLASH2015, Pages 1-10, October 2015. DOI: 10.1145/2837476.2837477
  3. Shimpei Sato, Yukinori Sato, and Toshio Endo. Investigating Potential Performance Benefits of Memory Layout Optimization based on Roofline Model. Proceedings of the 2nd Workshop on Software Engineering for Parallel Systems (SEPS 2015), held in conjunction with SPLASH2015, Pages: 50-56, October 2015. DOI: 10.1145/2837476.2837483
  4. Yukinori Sato. Exana: An Application Profiling and Optimization Infrastructure for Accelerating Systems with Deeper Memory Hierarchy. JST/CREST International Symposium on Post Petascale System Software (ISP2S2), December 2014. [presentation details]
  5. Yuki Matsubara and Yukinori Sato. Online memory access pattern analysis on an application profiling tool. 5th International Workshop on Advances in Networking and Computing, 2014 (WANC2014). In Proceedings of 2014 Second International Symposium on Computing and Networking, pp.602-604, December 2014. (DOI:10.1109/CANDAR.2014.86)
  6. Yukinori Sato. Architecting Dynamic Compilation Mechanisms for Transparent Performance Tuning of Data Locality in Memory Subsystem. The International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA) 2014, March 2014.
  7. Yukinori Sato, Hiroko Midorikawa and Toshio Endo. Identifying Working Data Set of Particular Loop Iterations for Dynamic Performance Tuning. In 6th Workshop on Architectural and Microarchitectural Support for Binary Translation (AMAS-BT2013). Held in conjunction with the 40th Int’l Symposium on Computer Architecture (ISCA-40)，June 2013. [Paper],[presentation pdf]
  8. Koichi Araki, Yukinori Sato, Vijay Jain, and Yasushi Inoguchi. Performance evaluation of audio fingerprint generation using haar wavelet transform. In Proceedings of the 2011 International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP11)，pp. 380-383，March 2011.
  9. M.M. Hafizur Rahman, Yukinori Sato, and Yasushi Inoguchi. Dynamic communication performance of a modified hierarchical 3D-torus network under non-uniform traffic patterns. The 2nd Workshop on Ultra Performance and Dependable Acceleration Systems. In Proceedings of 2010 First International Conference on Networking and Computing(ICNC’10), pp.167-172, November 2010. (DOI:10.1109/IC-NC.2010.27) (link to IEEE Xplore)
  10. Yukinori Sato and Tadao Nakamura. Profiling the dynamic behavior of nested loops using the loop-call context tree. In 2nd Workshop on Infrastructures for Software/Hardware co-design (WISH), held in conjunction with 2010 International Symposium on Code Generation and Optimization (CGO), April 2010.
  11. Truong Vinh Truong Duy, Yukinori Sato, and Yasushi Inoguchi. Performance evaluation of a green scheduling algorithm for energy savings in cloud computing. The 6th Workshop on High-Performance, Power-Aware Computing held in conjunction with IEEE International Parallel & Distributed Processing Symposium (IPDPS 2010). In Proceedings of 2010 IEEE International Symposium on Parallel and Distributed Processing, Workshop and Phd Forum (IPDPSW) , pp. 1–8, April 2010. (DOI:10.1109/IPDPSW.2010.5470908) (link to IEEE Xplore)
  12. Truong Vinh Truong Duy, Yukinori Sato, and Yasushi Inoguchi. Improving accuracy of host load predictions on computational grids by artificial neural networks. 11th Workshop on Advances in Parallel and Distributed Computational Models held in conjunction with IEEE International Parallel & Distributed Processing Symposium (IPDPS 2009). In Proceedings of the 2009 IEEE International Symposium on Parallel and Distributed Processing, pp. 1–8, May 2009. (DOI:10.1109/IPDPS.2009.5160878) (link to IEEE Xplore)
  13. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Run-time detection mechanism of nested call-loop structure to monitor the actual execution of codes. First International Workshop on Software Technologies for Future Dependable Distributed Systems. In Proceedings of 2009 Software Technologies for Future Dependable Distributed Systems, pp.184–188, March 2009. (DOI:10.1109/STFSSD.2009.30) (link to IEEE Xplore)
  14. Yukinori Sato and Tadao Nakamura. Run-time data dependence analysis using detected loop regions in binary codes. In 2009 Workshop on Infrastructures for Software/Hardware co-design (WISH), held in conjunction with 2009 International Symposium on Code Generation and Optimization (CGO), 2009.
  15. Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura. Power and performance advantages of the highly clustered microarchitecture. In International Workshop on Advanced Low Power Systems (ALPS). Held in conjunction with the 20th International Conference on Supercomputing, pp. 55–62, 2006.

 [Top]

5. Poster Presentations
  1. Shimpei Sato, Akihiko Saijo, Yukinori Sato. A Profiling Tool set for measuring B/F Ratios and Cache Behaviors from Actual Applications. JST/CREST International Symposium on Post Petascale System Software (ISP2S2), December 2014. [presentation details]
  2. Shimpei Sato, Yuki Matsubara, Akihiko Saijo, Yukinori Sato. An Application Profiling Toolchain for Accelerating Systems with Deeper Memory Hierarchy. The 2014 International Conference for High Performance Computing, Networking, Storage, and Analysis (SC’14), November 2014. (The poster was displayed in JAIST booth at the exhibit.)
  3. Shimpei Sato, Akihiko Saijo, Yukinori Sato. Profiling B/F Ratios and Cache Behaviors within Loop and Call Nests in the Actual Program Execution. 2014 ATIP Workshop: Japanese Research Toward Next-Generation Extreme Computing, November 2014.
  4. Yuki Matsubara, Yukinori Sato. Dynamic Compilation and Memory Access Analysis Tools for Accelerating Systems with Deeper Memory Hierarchy. The International Conference for High Performance Computing, Networking, Storage and Analysis (SC13), November 2013. (The poster was displayed in JAIST booth at the exhibit.)
  5. Tomoaki Ukezono, Yukinori Sato, Kiyofumi Tanaka. An Analysis for Deeper Memory Hierarchy in HPCS. IEEE/ACM International Conference for High Performance Computing, Networking, Storage and Analysis (SC12), November 2012. (The poster was displayed in JAIST booth at the exhibit.)

[Top]

6. Books and Other Publications

A Chapter in a Book

  1. Yukinori Sato. HPC Systems at JAIST and Development of Dynamic Loop Monitoring Tools Toward Runtime Parallelization. In High Performance Computing on Vector Systems 2011. Pages 65-78，Springer Berlin Heidelberg. Print ISBN 978-3-642-22243-6, 2012. (DOI:10.1007/978-3-642-22244-3_5) (link to Springer Link)

[Top]